// ****************************************************************************** 
// Copyright     :  Copyright (C) 2018, Hisilicon Technologies Co. Ltd.
// File name     :  glb_cfg_axi_c_union_define.h
// Project line  :  K3
// Department    :  K3
// Author        :  Huawei
// Version       :  V100
// Date          :  2015/4/10
// Description   :  HiVcodecV100 VDEC
// Others        :  Generated automatically by nManager V4.2 
// History       :  Huawei 2018/04/10 10:02:39 Create file
// ******************************************************************************

#ifndef __GLB_CFG_AXI_C_UNION_DEFINE_H__
#define __GLB_CFG_AXI_C_UNION_DEFINE_H__

/* Define the union U_EMAR_OUTSANDING */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_0           : 19  ; /* [31:13] */
        unsigned int    acfg2arb_mid_en : 1  ; /* [12] */
        unsigned int    acfg2arb_rosd   : 8  ; /* [11:4] */
        unsigned int    acfg2arb_wosd   : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_EMAR_OUTSANDING;

/* Define the union U_ALL_R_MID_RRMAX */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_1                  : 7  ; /* [31:25] */
        unsigned int    all_r_arbit_mid_rrmax4 : 5  ; /* [24:20] */
        unsigned int    all_r_arbit_mid_rrmax3 : 5  ; /* [19:15] */
        unsigned int    all_r_arbit_mid_rrmax2 : 5  ; /* [14:10] */
        unsigned int    all_r_arbit_mid_rrmax1 : 5  ; /* [9:5] */
        unsigned int    all_r_arbit_mid_rrmax0 : 5  ; /* [4:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_ALL_R_MID_RRMAX;

/* Define the union U_R_BG_ADJUST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_2       : 30  ; /* [31:2] */
        unsigned int    cfg_bg_kind : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_R_BG_ADJUST;

/* Define the union U_VDH_FORCE_REQ_ACK_AXI */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_3             : 30  ; /* [31:2] */
        unsigned int    vdh_force_req_ack : 1  ; /* [1] */
        unsigned int    bpd_force_req_ack : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VDH_FORCE_REQ_ACK_AXI;

/* Define the union U_ALL_R_MID_INFO */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sel_signal   : 4  ; /* [31:28] */
        unsigned int    ch0_signal   : 4  ; /* [27:24] */
        unsigned int    ch1_signal   : 4  ; /* [23:20] */
        unsigned int    ch2_signal   : 4  ; /* [19:16] */
        unsigned int    ch3_signal   : 4  ; /* [15:12] */
        unsigned int    cur_rcmd_st  : 4  ; /* [11:8] */
        unsigned int    rsv_4        : 1  ; /* [7] */
        unsigned int    rcmd_chn_cnt : 7  ; /* [6:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_ALL_R_MID_INFO;

/* Define the union U_ALL_W_MID_INFO */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sel_signal     : 6  ; /* [31:26] */
        unsigned int    ch0_signal     : 6  ; /* [25:20] */
        unsigned int    ch1_signal     : 6  ; /* [19:14] */
        unsigned int    rsv_5          : 2  ; /* [13:12] */
        unsigned int    wcmd_b_chn_cnt : 6  ; /* [11:6] */
        unsigned int    wcmd_chn_cnt   : 2  ; /* [5:4] */
        unsigned int    rsv_6          : 1  ; /* [3] */
        unsigned int    cur_wcmd_st    : 3  ; /* [2:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_ALL_W_MID_INFO;

/* Define the union U_AXI_SOFTRST_STATE0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    bus_valid_sig : 8  ; /* [31:24] */
        unsigned int    cbb_valid_sig : 8  ; /* [23:16] */
        unsigned int    cbb_ready_sig : 8  ; /* [15:8] */
        unsigned int    bus_ready_sig : 8  ; /* [7:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_AXI_SOFTRST_STATE0;

/* Define the union U_AXI_SOFTRST_STATE1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_7           : 2  ; /* [31:30] */
        unsigned int    bus_axi_rst_ack : 1  ; /* [29] */
        unsigned int    bus_axi_rst_req : 1  ; /* [28] */
        unsigned int    srcr_cur_fsm    : 2  ; /* [27:26] */
        unsigned int    srcw_cur_fsm    : 2  ; /* [25:24] */
        unsigned int    rsv_8           : 2  ; /* [23:22] */
        unsigned int    wr_aw_wlast_cnt : 6  ; /* [21:16] */
        unsigned int    rsv_9           : 2  ; /* [15:14] */
        unsigned int    wr_cnt          : 6  ; /* [13:8] */
        unsigned int    rsv_10          : 1  ; /* [7] */
        unsigned int    rd_cnt          : 7  ; /* [6:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_AXI_SOFTRST_STATE1;


//==============================================================================
/* Define the global struct */
typedef struct
{
    volatile U_EMAR_OUTSANDING       EMAR_OUTSANDING       ; /* 0 */
    volatile U_ALL_R_MID_RRMAX       ALL_R_MID_RRMAX       ; /* 4 */
    volatile U_R_BG_ADJUST           R_BG_ADJUST           ; /* 8 */
    volatile U_VDH_FORCE_REQ_ACK_AXI VDH_FORCE_REQ_ACK_AXI ; /* C */
    volatile U_ALL_R_MID_INFO        ALL_R_MID_INFO        ; /* 40 */
    volatile U_ALL_W_MID_INFO        ALL_W_MID_INFO        ; /* 44 */
    volatile U_AXI_SOFTRST_STATE0    AXI_SOFTRST_STATE0    ; /* 48 */
    volatile U_AXI_SOFTRST_STATE1    AXI_SOFTRST_STATE1    ; /* 4C */

} S_glb_cfg_axi_REGS_TYPE;

/* Declare the struct pointor of the module glb_cfg_axi */
extern volatile S_glb_cfg_axi_REGS_TYPE *gopglb_cfg_axiAllReg;

/* Declare the functions that set the member value */
int iSetEMAR_OUTSANDING_acfg2arb_mid_en(unsigned int uacfg2arb_mid_en);
int iSetEMAR_OUTSANDING_acfg2arb_rosd(unsigned int uacfg2arb_rosd);
int iSetEMAR_OUTSANDING_acfg2arb_wosd(unsigned int uacfg2arb_wosd);
int iSetALL_R_MID_RRMAX_all_r_arbit_mid_rrmax4(unsigned int uall_r_arbit_mid_rrmax4);
int iSetALL_R_MID_RRMAX_all_r_arbit_mid_rrmax3(unsigned int uall_r_arbit_mid_rrmax3);
int iSetALL_R_MID_RRMAX_all_r_arbit_mid_rrmax2(unsigned int uall_r_arbit_mid_rrmax2);
int iSetALL_R_MID_RRMAX_all_r_arbit_mid_rrmax1(unsigned int uall_r_arbit_mid_rrmax1);
int iSetALL_R_MID_RRMAX_all_r_arbit_mid_rrmax0(unsigned int uall_r_arbit_mid_rrmax0);
int iSetR_BG_ADJUST_cfg_bg_kind(unsigned int ucfg_bg_kind);
int iSetVDH_FORCE_REQ_ACK_AXI_vdh_force_req_ack(unsigned int uvdh_force_req_ack);
int iSetVDH_FORCE_REQ_ACK_AXI_bpd_force_req_ack(unsigned int ubpd_force_req_ack);
int iSetALL_R_MID_INFO_sel_signal(unsigned int usel_signal);
int iSetALL_R_MID_INFO_ch0_signal(unsigned int uch0_signal);
int iSetALL_R_MID_INFO_ch1_signal(unsigned int uch1_signal);
int iSetALL_R_MID_INFO_ch2_signal(unsigned int uch2_signal);
int iSetALL_R_MID_INFO_ch3_signal(unsigned int uch3_signal);
int iSetALL_R_MID_INFO_cur_rcmd_st(unsigned int ucur_rcmd_st);
int iSetALL_R_MID_INFO_rcmd_chn_cnt(unsigned int urcmd_chn_cnt);
int iSetALL_W_MID_INFO_sel_signal(unsigned int usel_signal);
int iSetALL_W_MID_INFO_ch0_signal(unsigned int uch0_signal);
int iSetALL_W_MID_INFO_ch1_signal(unsigned int uch1_signal);
int iSetALL_W_MID_INFO_wcmd_b_chn_cnt(unsigned int uwcmd_b_chn_cnt);
int iSetALL_W_MID_INFO_wcmd_chn_cnt(unsigned int uwcmd_chn_cnt);
int iSetALL_W_MID_INFO_cur_wcmd_st(unsigned int ucur_wcmd_st);
int iSetAXI_SOFTRST_STATE0_bus_valid_sig(unsigned int ubus_valid_sig);
int iSetAXI_SOFTRST_STATE0_cbb_valid_sig(unsigned int ucbb_valid_sig);
int iSetAXI_SOFTRST_STATE0_cbb_ready_sig(unsigned int ucbb_ready_sig);
int iSetAXI_SOFTRST_STATE0_bus_ready_sig(unsigned int ubus_ready_sig);
int iSetAXI_SOFTRST_STATE1_bus_axi_rst_ack(unsigned int ubus_axi_rst_ack);
int iSetAXI_SOFTRST_STATE1_bus_axi_rst_req(unsigned int ubus_axi_rst_req);
int iSetAXI_SOFTRST_STATE1_srcr_cur_fsm(unsigned int usrcr_cur_fsm);
int iSetAXI_SOFTRST_STATE1_srcw_cur_fsm(unsigned int usrcw_cur_fsm);
int iSetAXI_SOFTRST_STATE1_wr_aw_wlast_cnt(unsigned int uwr_aw_wlast_cnt);
int iSetAXI_SOFTRST_STATE1_wr_cnt(unsigned int uwr_cnt);
int iSetAXI_SOFTRST_STATE1_rd_cnt(unsigned int urd_cnt);

#endif // __GLB_CFG_AXI_C_UNION_DEFINE_H__
